Thyristor, a High-Density "Latch"
Similar to 6T-SRAM, use of thyristor provides a positive regenerative feedback that results in very large bitcell operation margins. The difference is that the four-transistor CMOS latch of a 6T-SRAM is replaced by the PNP-NPN bipolar latch of a single thyristor device, which reduces cell area dramatically and enables high-density macros. The thyristor latch is only activated during read/write operation to sense/change its stored charge and is kept off in standby, providing low-power operation.

Best-in-class Read Performance
Thyristor's PNP-NPN latch provides a positive regenerative feedback that result in a very large on/off current ratio of over six orders of magnitude and non-destructive read. These features enable a very large read margin (and yield), as well as excellent read speed.

TCCT, 1000x Faster Write than Conventional Thyristor
The use of T-RAM Semiconductor's proprietary thyristor device structure (known as TCCT™) and associated write operation breaks through the slow turn-off barrier of conventional thyristors and enables very fast write operation in Thyristor-RAM.

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