T-RAM
News
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| 11/20/2006 |
T-RAM Names Sam R. Nakib President and CEO
Milpitas, CA November
20, 2006 –Sam
R. Nakib has joined
T-RAM Semiconductor
as
President and Chief Executive
Officer it was announced today by the company. He will
also serve as a member of the Board of Directors.
Mr. Nakib is an industry veteran with over 30 years’
experience in the semiconductor industry in areas of
marketing and sales, business development and general
management. Most recently, he was President and CEO of
Berkäna Wireless, when it
introduced the first fully integrated, CMOS, cellular RF
transceiver for GSM/GPRS. While at Berkäna, Mr. Nakib
also oversaw development of the next-generation 3.5G
transceiver, and directed the company’s acquisition by
Qualcomm in December 2005.
Before Berkäna, Mr. Nakib served as Senior Vice
President of Business Development and Tactical Marketing
at Cypress Semiconductor, and was Senior Vice President
of Worldwide Sales at IC Works when it was acquired by
Cypress. Prior to that, he was with Texas Instruments
for 18 years in senior international sales and
management positions. In addition, Mr. Nakib serves on
the Board of Directors of Mobius Microsystems. He holds
a Bachelor of Science Degree in Biochemistry from
California State.
“We are delighted to have Sam bring his experience in
developing successful business enterprises and strategic
partnerships to lead T-RAM as it progresses towards
commercialization of its innovative SRAM memory process
technology,” said Dado Banatao, Chairman of the Board at
T-RAM, and a Managing Partner of Tallwood Venture
Capital.
“I
am very excited to join T-RAM at this time,” said Mr.
Nakib. “For years, system designers have dreamed of a
memory device combining the performance of SRAM and the
features of DRAMs. We’ve developed that technology and
are successfully bringing it to market to address those
needs.” |
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| 04/12/2005 |
T-RAM Closes $40M Series C: Led
by InterWest Partners and joined by CenterPoint Ventures
along with the Series A & B investors Tallwood Venture
Capital, Mayfield, US Venture Partners and NEA, T-RAM
closed an additional $40M in funding. T-RAM, a fabless
semiconductor startup is developing a novel SRAM memory
process technology that is expected to have the high performance
of SRAM but with a memory cell size approaching that of
DRAM.
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| 03/29/2005 |
T-RAM was granted
Patent #6,872,602 titled "Carrier coupler for thyristor-based
semiconductor device" which is a divisional of T-RAM’s
6,756,612 patent
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| 01/18/2005 |
T-RAM was granted Patent #6,845,037
titled "Reference cells for TCCT based memory cells"
which is a divisional of T-RAM’s 6,756,612 patent
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12/28/2004
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T-RAM was granted Patent #6,835,997
titled "Thyristor based device with trench dielectric
material" that discloses a thyristor having at least
one body region in a substrate and a thyristor control
port in a trenched region of the substrate.
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| 14/12/2004 |
T-RAM first IEDM presentation of its NDR TCCT technology.
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12/07/2004
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T-RAM was granted Patent #6,828,202
titled "Semiconductor region self-aligned with ion
implant shadowing" that discloses a semiconductor
device that includes doped regions of a substrate spaced
at selected distances from features at an upper surface
of the substrate.
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12/07/2004
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T-RAM was granted Patent #6,828,176
titled "Thyristor having a first emitter with relatively
lightly doped portion to the base" which is a divisional
of T-RAM’s 6,703,646 patent
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11/16/2004
|
T-RAM was granted Patent #6,819,278
titled "Geometric D/A converter for a delay locked
loop" which is a continuation of T-RAM’s 6,734,815
patent
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11/16/2004
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T-RAM was granted Patent #6,818,482
titled "Method for trench isolation for thyristor
based device" that discloses a semiconductor device
that includes a thyristor body having at least one region
in a substrate.
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11/09/2004
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T-RAM was granted Patent #6,815,734
titled "Varied trench depth for thyristor isolation"
that discloses a semiconductor device having a thyristor
and trench arranged to electrically insulate an emitter
region of the thyristor from another circuit structure.
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| 10/12/2004 |
T-RAM was granted Patent #6,804,162
titled "Read-modify-write memory using read-or-write
banks" that discloses a memory system in which minimal
memory access times are realized by using a single access
to a read-modify-write bank.
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| 09/14/2004 |
T-RAM was granted Patent #6,790,713
titled "Method for making an inlayed thyristor-based
device" that discloses a method for manufacturing
a semiconductor device having a substrate and in which
a trench is formed with part of the thyristor being formed
in a filled portion of the trench.
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| 08/31/2004 |
T-RAM was granted Patent #6,785,169
titled "Memory cell error recovery" that discloses
a semiconductor memory that improves soft error rate by
using a mirror bit to recover from soft error.
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| 08/24/2004 |
T-RAM was granted Patent #6,781,888
titled "Reference cells for TCCT based memory cells"
that discloses a reference cell capable of producing a
reference current that is about half of the current produced
by a memory cell.
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| 08/17/2004 |
T-RAM was granted Patent #6,778,435
titled "Memory architecture for TCCT-based memory
cells" that discloses a memory architecture for thyristor-based
memory cells and can provide a reference signal.
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| 08/17/2004 |
T-RAM was granted Patent #6,777,271
titled "Thyristor-based device including trench isolation"
which is a divisional of T-RAM’s 6,727,528 patent
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| 07/27/2004 |
T-RAM was granted Patent #6,767,770
titled "Method of forming self-aligned thin capacitively-coupled
thyristor structure" that discloses a semiconductor
memory device having a thyristor and is manufactured in
a manner that makes possible self-alignment of one or
more portions of the thyristor.
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| 06/29/2004 |
T-RAM was granted Patent #6,756,838
titled "Charge pump based voltage regulator with
smart power regulation" that discloses a charge pump
based voltage regulator with smart power regulation, and
regulator employs an architecture that requires the charge
pump current be a linear combination of the load current
and a clamp current with a possible offset current.
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| 06/29/2004 |
T-RAM was granted Patent #6,756,612
titled "Carrier coupler for thyristor-based semiconductor
device" that discloses a thyristor-based semiconductor
device that can improve switching times by enhancing carrier
drainage from a buried thyristor-emitter region.
|
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| 05/11/2004 |
T-RAM was granted Patent #6,735,113
titled "Circuit and method for implementing a write
operation with TCCT-based memory cells" that discloses
a circuit and a method for providing nondestructive write
operations and optimized memory access operations with
reduced power consumption during memory access, such as
during write operations
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| 05/11/2004 |
T-RAM was granted Patent #6,734,815
titled "Geometric D/A converter for a delay-locked
loop" that discloses a geometric DAC architecture
that includes a series of substantially identical sub-DACs,
each sub-DAC having n taps.
|
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| 04/27/2004 |
T-RAM was granted Patent #6,727,528
titled "Thyristor-based device including trench dielectric
isolation for thyristor-body regions" that discloses
a thyristor designed to reduce or eliminate manufacturing
and operational difficulties commonly experienced in the
formation and operation of NDR devices.
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| 04/13/2004 |
T-RAM was granted Patent #6,721,220
titled "Bit line control and sense amplification
for TCCT-based memory cells" that discloses a circuit
and a method that provide for facilitating control of
bit lines in preparation for, or during, sense amplification
of data signals from thin capacitively-coupled thyristor
based memory cells.
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| 03/09/2004 |
T-RAM was granted Patent #6,703,646
titled "Thyristor with lightly-doped emitter"
that discloses a thyristor-based semiconductor device
that exhibits a relatively increased base-emitter capacitance
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| 02/10/2004 |
T-RAM was granted Patent #6,690,039
titled "Thyristor-based device that inhibits undesirable
conductive channel formation" that discloses a semiconductor
device that is adapted to inhibit the formation of a parasitic
MOS-inversion channel between an emitter region and a
gated base in a capacitively-coupled thyristor device.
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| 02/10/2004 |
T-RAM was granted Patent #6,690,038
titled "Thyristor-based device over substrate surface"
which is a divisional of T-RAM’s 6,653,174 patent
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| 02/03/2004 |
T-RAM was granted Patent #6,686,612
titled "Thyristor-based device adapted to inhibit
parasitic current" that discloses an arrangement
that can inhibit parasitic current leakage from a thyristor-based
semiconductor device.
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| 01/27/2004 |
T-RAM was granted Patent #6,683,330
titled "Recessed thyristor control port" that
discloses a semiconductor device that includes a substrate
having an upper surface, a thyristor region in the substrate
and a control port adapted for capacitively coupling to
at least a portion of the thyristor region via a dielectric
material.
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| 12/23/2003 |
T-RAM was granted Patent #6,666,481
titled "Shunt connection to emitter" that discloses
a thyristor, a pass device and a conductive shunt that
electrically connects an emitter region of the thyristor
with a node near an upper surface of a substrate.
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| 11/25/2003 |
T-RAM was granted Patent #6,653,175
titled "Stability in thyristor-based memory device"
which is a divisional of T-RAM’s 6,462,359 patent.
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| 11/25/2003 |
T-RAM was granted Patent #6,653,174
titled "Thyristor-based device over substrate surface"
that discloses various methods of forming a thyristor
having some or all of the body of the thyristor extending
above a substrate surface.
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| 08/26/2003 |
T-RAM was granted Patent #6,611,452
titled "Reference cells for TCCT based memory cells"
that discloses a reference cell that produces a voltage
rise on a bit line that is proportional to, and preferably
half of, the voltage rise on another bit line produced
by a thyristor based memory cell in an "on"
state.
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| 06/24/2003 |
T-RAM was granted Patent #6,583,452
titled "Thyristor-based device having extended capacitive
coupling" that discloses a thyristor-based semiconductor
device having a thyristor that exhibits increased capacitive
coupling between a conductive structure and a portion
of a thyristor.
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| 10/08/2002 |
T-RAM was granted Patent #6,462,359
titled "Stability in thyristor-based memory device"
that discloses a semiconductor device having a thyristor-based
memory device that exhibits improved stability under adverse
operating conditions related to temperature, noise, electrical
disturbances and light.
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| 05/31/2002 |
T-RAM Closes $35M Series B: Led
by NEA and an un-named strategic investor, with continued
participation by the Series A investors Tallwood Venture
Capital, Mayfield and US Venture Partners, T-RAM closed
an additional $35M in funding. T-RAM, a fabless semiconductor
startup is developing a novel SRAM memory process technology
that is expected to have the high performance of SRAM
but with a memory cell size approaching that of DRAM.
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| 10/15/2001 |
T-RAM selects Motorola as Foundry: T-RAM selected Freescale
Semiconductor (2004 spin-off of Motorola) for its foundry
partner. T-RAM will use Freescale's Austin, TX MOS13 production
and R&D facility to develop and manufacture T-RAM's
first implementation of its TCCT (Thin-Capacitively-Coupled-Thyristor)
High-Performance SRAM technology on 130nm SOI (Silicon-On-Insulator).
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| 08/22/2000 |
T-RAM Closes $11M Series A: Tallwood
Venture Capital, Mayfield and US Venture Partners combined
have invested $11M in T-RAM, a fabless semiconductor startup.
T-RAM is developing a novel SRAM memory process technology
that is expected to have the high performance of SRAM
but with a memory cell size approaching that of DRAM.
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